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In cache coherency protocol literature, Write-Once was the first write-invalidate protocol defined. It has the optimization of executing write-through on the first write and a write-back on all subsequent writes, reducing the overall bus traffic in consecutive writes to the computer memory. It was first described by James R. Goodman in () (1983). Cache coherence protocols are an important issue in Symmetric multiprocessing systems, where each CPU maintains a cache of the memory. == States == In this protocol, each block in the local cache is in one of these four states: * Invalid: This block has an incoherent copy of the memory. * Valid: This block has a coherent copy of the memory. The data may be possibly shared, but its content is not modified. * Reserved: The block is the only copy of the memory, but it is still coherent. No write-back is needed if the block is replaced. * Dirty: The block is the only copy of the memory and it is incoherent. This copy was written one or more times. This is the only state that generates a write-back when the block is replaced in the cache. These states have exactly the same meanings as the four states of the MESI protocol (they are simply listed in reverse order), but this is a simplified form of it that avoids the Read for Ownership operation. Instead, all invalidation is done by writes to main memory. For any given pair of caches, the permitted states of a given cache line are as follows (abbreviated in the order above): 抄文引用元・出典: フリー百科事典『 ウィキペディア（Wikipedia）』 ■ウィキペディアで「Write-once (cache coherence)」の詳細全文を読む スポンサード リンク
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